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| M62213P/FP General Purpose High Speed PWM Control IC REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Description M62213P/FP is designed as a general purpose high-speed PWM control IC. This small 10 pin package contains many function and protection circuits allowing simpler peripheral circuits and compact set design. This IC can operate high speed switching (700 kHz Max.) with high speed PWM comparator and current limiting circuit. Features * 700 kHz operation to MOS FET Output current IO = 1 A Totempole output * Timer type latch protection circuit with OVP * Soft start operation is possible (with dead time control) * Built-in OP Amp for feedback control (photo coupler can be driven) * High speed pulse-by-pulse current limiting * Small size 10-pin SOP package Application Switching Regulator DC/DC Converter REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 1 of 10 M62213P/FP Block Diagram VCC CLM UVLO CLM comp. S R CLM latch COLLECT Note 0.2 V CT (OVP) Timer latch PWM comp. S R PWM latch VOUT + 2.5 V - OSC. EMIT Note GND EA IN EA OUT SOFT (DTC) RF CF Note: GND terminal is connected to emitter terminal as M62213FP in IC inside. And VCC terminal is connected to collector terminal as M62213FP in IC inside. REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 2 of 10 M62213P/FP Pin Arrangement M62213FP VOUT GND CLM RF CF 1 2 3 4 5 10 9 8 7 6 VCC EA IN EA OUT CT SOFT (Top view) Outline: PRSP0010DB-A (10P2N-A) M62213P VOUT EMIT GND CLM RF CF N.C 1 2 3 4 5 6 7 14 13 12 11 10 9 8 COLLECT VCC EA IN EA OUT CT SOFT N.C (Top view) Outline: PRDP0014AA-A (14P4) Absolute Maximum Ratings (Ta = 25C, unless otherwise noted) Item Supply voltage Output terminal current CT terminal supply voltage EA IN terminal supply voltage CLM terminal supply voltage Power dissipation Thermal derating Operating temperature Storage temperature Symbol VCC IOUT VCT VEA IN VCLM Pd K Topr Tstg Ratings 36 150 1.0 36 10 -0.3 to +4.0 1500 440 12 3.52 -20 to +85 -40 to +150 Unit V mA A V V V mW mW/C C C Ta 25C P FP P FP Condition Continuous Peak REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 3 of 10 M62213P/FP Electrical Characteristics (Ta = 25C, VCC = 14 V, unless otherwise noted.) Limits Block All device Item Supply voltage range Operation start-up voltage Operation stop voltage Start-up and stop voltage difference Stand-by current Operating current Timer latch circuit current CT CT term. "H" threshold voltage CT term. "L" threshold voltage CT term. discharge current CT term. charge current Error Amp Reference voltage Input bias current Open loop gain Unity gain bandwidth Output source current Output voltage (High) Output voltage (Low) CLM CLM term. threshold voltage CLM term. output current CLM term. delay time SOFT Input voltage range at 0% duty Input. voltage at 50% duty Maximum duty Soft term. input current OSC Maximum oscillation frequency Oscillation frequency Output Output low voltage VCC VCC(START) VCC(STOP) VCC ICCL ICCO ICCOFF VTHCTH VTHCTL ICTDCHG ICTCHG VB IB AV fT IOS VOm+ VOm- VTHCLM IOUTCLM TPDCLM VSOFT (0%) VSOFT (50%) Duty Max ISOFT fOSCmax fOSC VOL1 VOL2 Output high voltage VOH1 VOH2 Output voltage rise time Output voltage fall time TRISE TFALL Symbol Min. VCC(STOP) 11.5 7.6 3.5 90 7.5 0.9 0.8 3.5 0.4 70 -33 2.4 -300 -140 4.7 0 180 -270 0 80 -65 150 12.0 11.5 Typ. 12.5 8.3 4.2 180 13 2.0 1.8 4.0 0.7 100 -15 2.5 -100 70 1 -100 5.25 0.1 200 -200 90 2.7 90 -50 200 0.04 0.3 12.7 12.5 50 35 Max. 35 13.5 9.0 5.1 270 22 3.0 2.7 4.5 1.0 130 -5 2.6 0 -60 6.25 0.3 220 -140 0.5 99 -31 700 250 0.4 1.4 Unit V V V V A mA mA mA V V A A V nA dB MHz A V V V A ns V V % A kHz kHz V V V V ns ns CF = 270pF, RF = 69k VCC = 14V, IO = 10mA VCC = 14V, IO = 100mA VCC = 14V, IO = -10mA VCC = 14V, IO = -100mA No load No load VCLM = 0V Delay time to output Soft term. voltage range to set 0% duty Soft term. voltage at 50% duty When VEA IN = 0V In normal operation In CLM actuating VCC = 14V VCC = VCC(STOP) + 0.2V VCC = VCC(START) - 0.5V Test Conditions REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 4 of 10 M62213P/FP Function Description And Application EA IN, EA OUT Terminal Circuit for EA OUT terminal is connected to constant current load (100 A Typ.) shown in figure 1. Output voltage of error amp. is controlled by the output transistor to provide current-sense comp. with the controlled voltage. 100 A EA OUT To PWM comp. Figure 1 Circuit Diagram of EA OUT Terminal 1. Peripheral circuit of error amp Detected voltage divided by R1 and R2 is input to EA IN terminal in such case as fly-back system where VCC line voltage is proportional to output voltage, or in the case that the voltage detection is made on the primary side. In this case operating region is set by R1 and R2, and AC gain by R1 // R2, RF. From detecting voltage Reference voltage (2.5 V) R1 EA IN R2 RF + - EA OUT Figure 2 Method to Detect The Voltage on The Primary Side In the case that feed forward system by photo-coupler is applied, following two methods are available. One is the method by error amp. as in figure 3-1, the other is by the direct connection to photo-coupler as in figure 3-2. When photo-coupler is directly connected to EA OUT terminal, input terminal of error amp. is connected to GND, photo-coupler is connected directly to EA OUT terminal. VCC R1 Reference voltage (2.5 V) RIN EA IN R2 RF + - EA OUT Figure 3-1 Method to Use Photo-Coupler (1) REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 5 of 10 M62213P/FP Reference voltage (2.5 V) + - EA IN EA OUT Figure 3-2 Method to Use Photo-Coupler (2) In figure 3-1, AC gain is represented as : AV = RF / RIN Proper gain setting is about 40 dB. RF should be 52 k or more due to the current source capability of error amp. R1, R2 should meet the condition as below so that the voltage of EAIN terminal should not be over 5 V. R2 * VCC / (R1 + R2) 5 V Due to the input impedance of EA IN terminal, the current in R1, R2 should be less than several mA. CT (OVP) Terminal Timer type latch circuit works as follows. Constant charge current flows out from CT terminal to the external capacitor when CLM is operative. When the voltage of CT terminal rises up to over 4.0 V (Typ.), the latch circuit operates to make functions of this IC inoperative. Inoperative status is sustained until supply voltage becomes less than stop voltage. The value for start-up register has to be set so that the current over 1.8 mA (Typ.) can flow the resistor because the stop status has to be kept by the current in start-up resistor R1 shown in application circuit. When timer latch circuit is operative, supply current increases at high voltage as shown in figure 4 to avoid the damage caused by unnecessarily increased supply voltage. Inoperative status goes back to operation by forcibly decreasing the voltage of CT terminal to less than 0.7 V. Supply Current (at timer latch) ICCOFF (mA) 3.0 2.5 Latch reset 8.3 V 2.0 1.5 1.0 0.5 0 5 10 15 20 25 30 35 40 Supply Voltage VCC (V) Figure 4 Supply Current vs. Supply Voltage Characteristics (at Timer Latch) REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 6 of 10 M62213P/FP Even if the timer function is not needed, latch function operates, that is, IC becomes inoperative when the voltage of CT terminal is forced to be high voltage. Therefore, CT terminal can also be used for OVP (over voltage protection). When only OVP function is needed (timer latch function is not necessary), connect the resistor between CT terminal and GND. In this case, the above mentioned charge current cannot make the voltage of CT terminal rise up to "H" threshold, thus latch function does not operate. (Refer to figure 5-1, 5-2) VCC OVP function operates when photo-coupler is ON. CT + Figure 5-1 Method to Use Timer Type Latch and OVP VCC OVP function operates when photo-coupler is ON. CT + Figure 5-2 Method to Use Only OVP SOFT(Duty Set-Up) Terminal The voltage of SOFT terminal determines the maximum duty. Maximum duty can be set by connecting the resistor as in figure 6 because the constant current compensated for temperature flows out of this terminal. And by connecting the capacitor between the terminal and GND, soft start function operates. That is, we can get the gradual increase of maximum duty at start-up. Maximum duty is represented as : Duty (Max.) (40.5 * VSOFT) - 58% where VSOFT = ISOFT * RSOFT (V), ISOFT 50 A (Typ.) If the voltage of SOFT terminal is higher than3.53 V (Typ.) (upper limit voltage of the oscillation waveform), maximum duty is internally decided to be 90%. Soft start time (TSOFT) is represented as : TSOFT CSOFT * 31 * 10 (s) 3 TSOFT means the time from start-up until the voltage of SOFT terminal goes up to higher than 1.4 V (Typ.) (lower limit voltage of the oscillation waveform). Discharging circuit operative before start-up at VCC is internally equipped so that the soft start never fail to operate at the restart of voltage supply. REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 7 of 10 M62213P/FP SOFT CSOFT + VSOFT Figure 6 Method to Set-up Duty and SOFT Start Function CLM Terminal This terminal is for pulse-by-pulse current limiting. Current limiting circuit is almost the same as that of M51995. The voltage detected by the current detecting resistor can be directly input as shown in figure 7-1, if the detected voltage is about the threshold voltage (200 mV (Typ.)), but if the voltage is larger than the threshold, the voltage has to be input divided by resistors as shown in figure 7-2. CLM OUT RNF CNF RCS Figure 7-1 Peripheral Circuit of CLM CLM OUT RNF1 CNF RNF2 RCS Figure 7-2 Peripheral Circuit of CLM When The Detected Voltage is High 1000 pF to 22000 pF is recommended for CNF. Be sure to use 100 or less for RNF and RNF1 // RNF2 (*) so that the detection sensitivity is not influenced by the current flown out from CLM terminal. Non-inductive resistor is recommended for current detecting resistor. * RNF1 // RNF2 = (RNF1 * RNF2) / (RNF1 + RNF2) Oscillation Frequency Oscillation frequency is set by capacitor connected to CF terminal. The waveform of CF terminal is triangular one with the ratio of 9 : 1 for charge-discharge period. Oscillation frequency is represented as: fOSC 1 (RF / 4.6) * CF + (1.2 x 10-6) (Hz) REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 8 of 10 M62213P/FP Attention for heat generation Although the absolute maximum rating of ambient temperature is spelled out as 85C, it is always annoying to specify the location this temperature refers to because the power dissipation generated locally in switching regulator is fairly large and the temperature in the vicinity of the IC varies from place to place. One of the recommendable ways to solve this problem is to check the temperature on the surface of the IC. The difference in temperature between IC junction and the surface of IC package is 30C or less when IC junction temperature is measured by utilizing the temperature characteristics of p-n junction forward voltage, and the surface temperature by "thermo-viewer" on the condition that the IC is mounted on the "phenol-base" PC board in normal atmosphere. This concludes that maximum case temperature (surface temperature of IC package) rating is 100C with adequate margin considering the absolute maximum rating of junction temperature is150C. M62213 Application Circuit (Fly-Back) Rush current prevention circuit + R1 AC input Line filter DC output VCC COLLECT Note OUT + CFIN R2 + CVCC CT (OVP) M62213P/FP CLM Note EMIT SOFT RF CF GND RCLM EA IN EA OUT CT + RDUTY + CSOFT RF CF Note: GND terminal is connected to emitter terminal as M62213FP in IC inside. And VCC terminal is connected to collector terminal as M62213FP in IC inside. REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 9 of 10 M62213P/FP Package Dimensions JEITA Package Code P-SOP10-5.7x6.8-1.27 RENESAS Code PRSP0010DB-A Previous Code 10P2N-A MASS[Typ.] 0.2g 10 6 HE *1 E F NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 1 5 c D Reference Symbol Index mark *2 A2 A1 Dimension in Millimeters *3 e bp Detail F y D E A2 A1 A bp c HE e y L Min 6.7 5.6 0 0.35 0.18 0 7.82 1.12 0.3 Nom Max 6.8 6.9 5.7 5.8 1.8 0.1 0.2 2.1 0.4 0.5 0.2 0.25 8 8.12 8.42 1.27 1.42 0.1 0.5 0.7 JEITA Package Code P-DIP14-6.3x19-2.54 A RENESAS Code PRDP0014AA-A Previous Code 14P4 MASS[Typ.] 1.0g 14 8 1 7 *1 c e1 E L *2 D NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. A2 A Reference Symbol Dimension in Millimeters e SEATING PLANE *3 b3 bp e1 D E A A1 A2 bp b3 c e L Min Nom Max 7.32 7.62 7.92 18.8 19.0 19.2 6.15 6.3 6.45 4.5 0.51 3.3 0.4 0.5 0.6 1.4 1.5 1.8 0.22 0.27 0.34 0 15 2.29 2.54 2.79 3.0 REJ03D0838-0300 Rev.3.00 Sep 05, 2007 Page 10 of 10 L A1 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. 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